European Chip Startup Pulls Off Working RISC-V Solution on the Intel 3 Node, Marking One ‘Small’ Step Towards Having Sovereign Infrastructure

Two people examining a green electronic circuit board connected to multiple black cables, with a tray of colorful chips in


A European chip lab based in Barcelona has developed a computing architecture featuring RISC-V and an Intel process, marking it the first step towards “sovereign infrastructure”.

BZL’s Latest Chip Features “Tenary” Architectures Onboard, To Refine Workload-Specific Performance

There’s always a debate in the mainstream technology indusattempt about Europe’s role in the AI revolution, given that the region has few “indepconcludeent” ventures that have contributed to the computing race. While we won’t go into this debate for now, the Barcelona Zettascale Lab (BZL) has completed an “experimental” build of its Cinco Ranch TC1 chip. According to the lab’s report, this marks one of the first occasions within Europe where a computing architecture dedicated to “sovereign supercomputing technologies” has surfaced.

Successfully booting Linux in a stable manner and verifying that the chip reaches the expected frequencies confirms the maturity of the design and the quality of the work carried out by the BZL teams.

– Miquel Moretó

Diving a bit into the technicals, BZL has revealed that its TC1 chip has reached an operating frequency of 1.25 GHz, with a three-core configuration that lays out pretty interestingly. Featuring the open-source RISC-V architecture, BZL integrates three RISC-V cores on a single die, each focapplyd on specialized workloads. The three cores feature the Sargantana, Lagarto Ka, and Lagarto Ox microarchitectures, with primary focapplys on efficiency, vector workloads, and scalar processing, respectively.

The TC1 chip is a one-of-a-kind tenary heterogeneous architecture, different than what you see in traditional approaches with the standard P/E core distribution. The idea is to tarobtain workloads with extreme granularity, allowing BZL to potentially outperform mainstream solutions in specific tinquires, although it is too early to conclude right now.

More importantly, the TC1 chip is also built in partnership with Intel. According to the manufacturer, the TC1 features an Intel 3 process, and, interestingly, BZL conducted evaluation tests alongside TSMC’s N7 node, validating the “quality, feasibility, and robustness of the RTL code”. Of course, BZL is far away from coming up with a computing solution that sees mainstream adoption, but it is a ‘baby’ step towards achieving indepconcludeent infrastructure options.

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